This invention relates, generally, to a multiplex system and more particularly to a time-slot addressed form of multiplexing for controlling input and output signals for various types of electrical devices.
Initially as well as in the present, classical wiring methods involved point to point wiring. However with the ongoing desire for increased production coupled with increased labor and operating costs, wire harnesses or assemblies are being used with greater frequency. Classical methods of such assemblies involved the fabrication and installation of point to point designated wire harness asemblies, terminated as necessary with compatible connectors and contacts or terminals. This still continues to be the predominant practice with only now automatic harness manufacturing coming into its own. This automated harness manufacturing does help to lower the cost involved therewith, but still results in hidden costs such as harness boards which must be maintained and stored for future use as well as tested harness assemblies. Further, such multiple wire, pre-made harness assemblies do remain typically difficult to install into electromechanical system assemblies, due to their size in relation to the required dressing for fitting amongst the apparatus such as motors contained in a piece of machinery. Further, such harness wiring techniques are not intrinsically modular but are rather fixed in nature, making new feature options or add-ons difficult.
With the introduction of microcomputer controlled technology into electromechanical systems, some economies were realized in the area where buss technology has been employed. However, the utilization of buss technology has generally required the utilization of some form of hand shaking, that is the recognition by the controlled device of the address sent by the microcomputer which is unique to the particular recognition device. Further, this type of technology generally utilizes ribbons of parallel conductors requiring a multitude of wires for signals such as address, command, resets, interrupts, power, grounds and timing. Additionally, such ribbon or buss type technologies which loop around electromechanical systems are susceptible to electrical noise being induced which may require the use of sophisticated and extensive error detection and/or correction techniques.
A number of discrete attempts have been made at different aspects of bus technology such as may be found in U.S. Pat. Nos. 4,293,177 "Flat Cable Connected" issued Oct. 6, 1981, to Weisenburger; 4,209,219 "Method and Apparatus for Terminating Multi-Conductor Cable" issued June 24, 1980, to Proietto; 4,206,962 "Data/Logic Connector" issued June 10, 1980, to Shue, Jr., et al; 4,160,573 "Flat Cable Connector" issued July 10, 1979, to Weisenburger; 4,113,341 "Electrical Connector Having Provision for Circuit Components" issued Sept. 12, 1978 to Hughes; 4,062,616 "Flat Flexible Cable Connector Assembly Including Insulation Piercing Contacts" issued Dec. 13, 1977, to Shaffer et al; 4,005,518 "Apparatus for Connecting Conductors in Flat Cable to Terminals in a Connector" issued Feb. 1, 1977, to Bakermans; and 3,879,099 "Flat Flexible Cable Connector Assembly Including Insulation Piercing Contacts" issued Apr. 22, 1975, to Shaffer. One attempt has been made, however, to begin to utilize buss technology in an electromechanical environment, a description of which can be found in U.S. Pat. No. 4,370,561 "Vehicle Multiplex System" issued Jan. 25, 1983, to Briggs.
However, systems such as this or devices such as those found in the mentioned patents are generally unsuitable for systems outside of their original field of intended use.
Accordingly, it is desirable to have a device or system which allows for bi-directionality, that is commands out, responses back, offers the potential of utilization with few conductors on which instructions and responses are sent while minimizing the amount of wire and the number of positions per connector and incorporates some of the standardized interconnection techniques such as those which are used in buss wiring. Further, it is desirable to have a system that is directly compatible with microcomputer hardware/software, which is capable of being fully and completely fabricatable on automatic machinery, in simple, relatively easy as well as inexpensive to manufacture and utilize, compatible with switching high or low voltage/power while providing transponding status, and which is also compatible with a variety of sensors for providing the status for such transponders. Additionally, it is desirable to have a device which is relatively immune to electrical interference. Such a device is taught by the present invention.
Accordingly, it is also desirable to have a device which teaches and as an object of the invention a time-slot addressed, system keyed multiplex device, comprising a master controller providing a timing signal bus, a data line bus, a power and ground bus, a timing circuit having an input connected to receive a timing signal from the timing signal bus and producing timing output signal pulses, a counting circuit having an input connected to receive the output signals of the timing circuit and producing a digital output signal wherein the digital output signal represents the number of pulses produced by the timing circuit, a plurality of address lines which represent an address code for the device, first logic gating circuit having a first set of inputs connected to a portion of the output signals of the counting circuit, and a second set of inputs connected to the address lines wherein when the address code matches a corresponding number of timing circuit pulses, a first gating output signal is produced, a logic decoder having the remaining portion of the output signals of the counting circuit connected thereto and which provides a binary coded decimal to octal conversion and thereby a sequential output signal pulse train thereat, response and command lines for receving the status condition or providing a logic command to an external transducer or load respectively and a second and third logic gating device having inputs connected to receive the octal signal pulses whereby said octal output pulses allow a logic condition which is contained on the data bus to present it to one of the command lines followed by a logic condition contained on one of the response lines to be presented it to the data bus.